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P4STA: High Performance Packet Timestamping with Programmable Packet Processors

Key:KSB+20
Author:Ralf Kundel, Fridolin Siegmund, Jeremias Blendin, Amr Rizk, Boris Koldehofe
Date:April 2020
Kind:In proceedings - use for conference & workshop papers
Publisher:IEEE
Book title:Proceedings of IEEE/IFIP Network Operations and Management Symposium
Keywords:Performance Measurement, Latency, Throughput, P4, Timestamping, Nanosecond Precision
Abstract:QoS requirements of current network control and management applications require the ability to conduct precise measurements of network elements, including switches, routers and Virtual Network Functions (VNFs). State-of-the-art network switches have a forwarding delay of 1μs and below and offer high bandwidths of hundreds Gigabits per second. This imposes high time accuracy and loss-detection requirements on measure- ment equipment that are not met by existing, software-based measurement tools. The use of specialized tools, meeting these requirements, is restricted by limited flexibility and high cost. In this work, we introduce P4STA, an open source frame- work that combines the flexibility of software-based traffic load generation with the accuracy of hardware packet timestamp- ing. Our evaluation results, obtained using an off-the-shelf P4- programmable switch, show that a time resolution up to 1ns can be achieved on these programmable data plane platforms. Moreover we show how to combine the traffic load of multiple software-based load generators to achieve a measurement load of up to 100Gbit/s per port. Experiments on further programmable platforms, specifically on P4-SmartNICs and FPGAs, show sim- ilar results. With this work, we make P4STA available for the research community to advance high performance experiment measurements at nanosecond accuracy.
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